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When implementing a sine calculator in digital hardware one has to
remember the expense of the multiplication needed for many algebraical
methods. Alternative techniques are based on polynomial approximation
and/or table-lookup [4] as well as shift and add algorithms
[5]. Among the various properties that are desireable,
one can cite speed, accuracy or the reasonable amount of resource
1.1
[6]. The architecture of FPGAs specifies suitable
techniques or might even change desireable properties. Because the
number of sequential cells and amount of storage area, needed for
table-lookup algorithms, are limited but combinational logic in terms
of LUT in the FPGA's CLBs is sufficiently available, shift and add
algorithms fit perfectly into an FPGA.
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Norbert Lindlbauer
2000-01-19